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  • In this video, I want to describe to you three examples of where advanced

  • packaging is already in use in your iPhone or your iPad.

  • So, I want to give you three sample cases. Two of them are where.

  • This, advanced packaging is used for form factor reduction.

  • That is to, you know, reduce the area that

  • these chips occupy on your PCB. And

  • I'll also give you one example in the case of the

  • image sensor for the camera for your iPhone or your iPad.

  • Where this this advanced packaging helps in improving the performance or improving

  • the image quality of your camera. So the very first place where

  • you can observe this advanced packaging technology being used

  • In the, in your smart phone is, is the microprocessor.

  • So, if you open up, if you open up this, A5

  • microprocessor chip and look at it sideways, this is how it looks.

  • So what you this is how it looks. So what you see if you look

  • at this side view.

  • Is that you can observe three pieces of silicon in here.

  • One is this, A5 microprocessors,and then there are these two chips

  • on top of which, which are I think two DRAM chips.

  • Which are stacked on top of each other,

  • and this microprocessor is in one, one, one package.

  • So this is one package. And these two DRAM chips are in this,

  • another package and what you have is basically this DRAM

  • stack DRAM package on top of this A5 microprocessor.

  • So this is also known as a package on package

  • implementation or where you have where also acronymed as PoP.

  • And what, again you can observe this, the

  • set of solder balls. So, this is flip chip ball grid array

  • so you can see this array of balls, solder balls

  • which are Connecting this microprocessors to the PCB below.

  • And you also see these, another set of

  • solder balls which are, connecting this second package.

  • This second DRAM package to carry the, to carry the supply voltage and

  • also connecting this microprocessor to the

  • DRAM

  • So, this, this is another cartoon which is depicting the same.

  • So, you have this first package of, so you

  • have these two packages. One is your microprocessor.

  • And then the other one is the stacked DRAM and then, there, this

  • microprocessor is, connected to, to the PCB below using

  • this flip chip package

  • So there are these micro bonds and then there are these ball grid array

  • array which connect this A5 microprocessor.

  • And then there also these second set of solder balls which are taking

  • the supply voltage from the PCB below to this DRAM chip

  • So this package on package implementation.

  • it's, it's mostly for a form factor reduction where esentially

  • you buy in your iphone or your ipad

  • or your smartphone where you're constrained for space.

  • You buy stacking these packages on top of each other.

  • You essentially achieve a form factor reduction.

  • So I want to quiz you on, in this package on package implementation.

  • Which package should be on the top?

  • So there could be two possible implementations.

  • one is, let's label one as implementation A, where

  • the DRAM chip is on the top of the microprocessor.

  • And, the option B, where the microprocessor is on top of the DRAM.

  • So I want to think, to guide your thoughts,

  • I want you to think along two directions.

  • Which in, one is that Which one is better from a heat management perspective.

  • Which option, either option A or

  • B is better from a heat management perspective.

  • The other thing I wanted you to think about

  • is which option is better from an I/O perspective.

  • Which option is better To manage the

  • input and output signals coming into this package.

  • From a heat perspective most of the

  • heat in this package is generated in this microprocessor.

  • So you'll have most of heat being generated here.

  • From a heat management perspective, it looks like option B might be

  • a better choice because in that case you can put a heat sink here

  • And you can have a steel plate as a heat sink

  • and you can better take out the heat from this package.

  • On the other hand in option A, you'll have this microprocessor heating up.

  • And that in turn will heat up your DRAM.

  • So if your DRAM chips heats up, then

  • it decreases the retention time of your DRAM cell

  • And you need to refresh it more often.

  • So it's bad for, for heating up of this DRAM chip is bad.

  • So from a heat management perspective it looks like option

  • B might be a better choice which places the microprocessor

  • on the top.

  • Let's look at it more from an I/O perspective.

  • So from an I/O perspective it if you think about these two pacakges.

  • If you have option a, you it's better from an I/O

  • perspective because most of your I/Os are actually coming to your microprocessor.

  • Because your microprocessor needs to communicate with the NAND

  • flash with your gyroscope, with your accelerometer.

  • So if you have this microprocessor on the bottom,

  • you could actually use this flip the, this microprocessor.

  • And use this flip chip package, to get your IO signals into your microprocessor.

  • On the other hand, if you had microprocessor

  • on the top, you need these wire bonds to.

  • bring all these signals from your PCB to your microprocessor.

  • So you need a whole mesh of wire bonds.

  • To, connect all the I/O signals to your microprocessor.

  • So from an I/O perspective, option b is, is bad.

  • So from an IO perspective, option A is the winner.

  • And so as

  • we saw in the current implementation which is used commercially,

  • we have this DRAM on top of the microproccesor. So probably

  • . It's being driven by this I/O perspective.

  • So second scenario where this advance packaging is used

  • in your smart phone is in this NAND flash memory chip.

  • Again, advanced packaging in this case is used for form factor reduction.

  • So if you pry open this NAND flash chip and

  • a package. And then look at the different, IC chips.

  • So, you see this stack of, a stack of these, ICs on top of each other.

  • In this case, I'm showing you a stack of 24, chips.

  • NAND flash chips, stacked on top of each other.

  • And each of them has a capacity of four gigabytes so this stack

  • has an enormous amount of storage capacity of

  • 96 gigabytes in this one single package. And you

  • can see they are, these chips are stacked in this domino fashion.

  • So you have these One domino of of these chips

  • and then you have another domino on top of that,

  • and then they are connected using these wire bonds

  • Looking at these wire bonds it's almost incredible that you know, these chips, the

  • stack is functioning without these these wire bonds shorting into each other.

  • Right, so this is another picture.

  • So this is showing it from another angle, where you have

  • these stack of these NAND flash memory chips.

  • There also a controller chip, which is on the top,

  • so this controller chip needs to communicate with So, looking

  • at this you know, it, it almost looks like you

  • know, and if you know, Spiderman with the third hand.

  • And you know, you have these incredible wire bonds and none of them are shorting

  • with each other and it's, it's just

  • amazing to see that this package still works.

  • And There, there's been a tremendous amount of

  • advancement in the wire bond technology as well.

  • Traditionally these wire bonds used to be made, of gold but with the

  • gold prices going up, they're actually, now these are actually made of copper.

  • And but there's still a lot of inertia left in this wire bond

  • technology and it's very prevalent and in use commercially at the moment.

In this video, I want to describe to you three examples of where advanced

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